View MK1707D_392784.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MK1707D
Low EMI Clock Generator
Description
The MK1707D generates a low EMI output clock from a crystal clock input. The part is designed to dither the LCD interface clock for flat panel graphics controllers. The device uses ICS' proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The MK1707D offers centered spread from a wide range of input clock frequencies. ICS offers many other clocks for computers and computer peripherals. Consult ICS when you need to replace multiple crystals and oscillators from your board.
Features
* * * * *
Packaged in 8-pin SOIC Available in Pb (lead) free package Provides a spread spectrum output clock Supports flat panel controllers Accepts a crystal or clock input to provide same frequency dithered output MHz
* Input operating frequencies of 25-54 and 50-108 * Peak reduction by 7dB to 14dB typical on 3rd through
19th odd harmonics
* * * * *
Low EMI feature can be disabled Includes power down Operating voltage of 3.3 V Industrial temperature range available Advanced, low-power CMOS process
Block Diagram
VDD
S1:0 Low EMI Enable
2
PLL Clock Synthesis and Spread Spectrum Circuitry
X1/ICLK
Clock Out
Input Buffer
X2
Load capacitors required for crystal input
GND
MDS 1707D F Integrated Circuit Systems, Inc.
1
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com
MK1707D Low EMI Clock Generator
Pin Assignment
X1/ICLK VDD GND CLK 1 2 3 4 8 7 6 5 X2 S1 S0 LEE
Spread Selection Table (MHz)
S1 Pin 7 S0 Pin 6 Spread Direction Spread (%) Input Frequency
8 pin (150 mil) SOIC
0 0 0 1 1 1
0 M 1 0 M 1
Center Center Center Center Center Center
1.15 0.95 1.9 1.6 1.9 0.6
25-54 25-54 50-108 25-54 25-54 50-108
0 = connect to GND M = unconnected (floating) has internal resistor network Leave it open (unconnected) 1 = connect to VDD
Pin Descriptions
Pin Number Pin Name Pin Type Pin Description
1 2 3 4 5 6 7 8
X1/ICLK VDD GND CLK LEE S0 S1 X2
Input Power Power Output Input Input Input XO
Crystal connection. Connect crystal or clock input. Connect to +3.3 V. Connect to ground. Spread spectrum clock output per table above. Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor. Disables the spread spectrum feature when low. Function select input. Selects spread amount and direction per table above. Internal mid-level. Function select 1 input. Selects spread amount and direction per table above. Internal mid-level. Crystal connection. Leave unconnected for clock input.
MDS 1707D F Integrated Circuit Systems, Inc.
2
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com
MK1707D Low EMI Clock Generator
External Components
The MK1707D requires a minimum number of external components for proper operation.
PCB layout Recommendations
For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI, the 33 series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the MK1707D. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. .
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected between VDD and GND on pins 2 and 3, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20.
Select Pin Operation
The S1, S0 select pins are 2-level, meaning they have three separate states to make the selections shown in the table on page 2.
MDS 1707D F Integrated Circuit Systems, Inc.
3
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com
MK1707D Low EMI Clock Generator
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK1707D. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70C -40 to +85C -65 to +150C 125C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Power Supply Voltage (measured in respect to GND)
Min.
0 -40 +3.135
Typ.
Max.
+70 +85
Units
C C V
3.3
+3.465
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5%, Ambient Temperature 0 to +70C
Parameter
Operating Voltage Input Low Voltage Input High Voltage Supply Current Input High Voltage Input Low Voltage Output High Voltage Output High Voltage Output Low Voltage Input Capacitance
Symbol
VDD VIL VIH IDD VIH VIL VOH VOH VOL CIN
Conditions
S0, S1 pins S0, S1 pins No load, at 3.3 V LEE pins LEE pins CMOS, IOH = -4 mA IOH = -12 mA IOL = -12 mA S0, S1, LEE pins
Min.
3.135 2.7
Typ.
3.3
Max.
3.465 0.5
Units
V V V mA V
20 2.0 0.5 VDD-0.4 2.4 0.4 5
V V V V pF
MDS 1707D F Integrated Circuit Systems, Inc.
4
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com
MK1707D Low EMI Clock Generator
MDS 1707D F Integrated Circuit Systems, Inc.
5
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com
MK1707D Low EMI Clock Generator
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V 5%, Ambient Temperature 0 to +70 C
Parameter
Input/Output Clock Frequency Input Clock Duty Cycle Output Clock Duty Cycle Output Rise Time Output Fall Time EMI Peak Frequency Reduction
Symbol
Conditions
Time above VDD/2 Time above 1.5 V
Min.
25 20 40
Typ.
Max. Units
108 80 MHz % % ns ns dB
50 1.5 1.5 7 to 14
60
tOR tOF
0.8 to 2.0 V 2.0 to 0.8 V 3rd through 19th odd harmonics
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
150 140 120 40
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
MDS 1707D F Integrated Circuit Systems, Inc.
6
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com
MK1707D Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters Symbol Min Max
Inches Min Max
E INDEX AREA
H
12 D
A A1 B C D E e H h L
h x 45
1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8
.0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8
A A1
C
-Ce
B SEATING PLANE L
.10 (.004)
C
Ordering Information
Part / Order Number
MK1707D MK1707DTR MK1707DLF MK1707DLFTR MK1707DI MK1707DITR MK1707DILF MK1707DILFTR
Marking
MK1707D MK1707D 1707DLF 1707DLF 1707DI 1707DI 1707DIL 1707DIL
Shipping Packaging
Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel
Package
8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC
Temperature
0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C
"LF" denotes Pb (lead) free packaging.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 1707D F Integrated Circuit Systems, Inc.
7
525 Race Street, San Jose, CA 95126
Revision 102804 tel (408) 297-1201
www.icst.com

▲Up To Search▲

Price & Availability of MK1707D

	To Download MK1707D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .